ST1C

Voltage regulator
ST1C
generic
Opensource
CIM model
RMS
phasor
MRL4
Single phase
ExcIEEEST1C
IEEE
dynawo
#106
Author

Erwan Guichard (DPS for RTE)

Published

May 4, 2024

Exc IEEE ST1C model

This article is incomplete, some sections must be written.

Context

This voltage regulator model first appeared in the IEEE Std 421.5-2016 [1]. It has been reproduced identically in the IEC 61970-302:2024 version [2]. In previous standard versions (1992, 2005), its predecessor model was called ST1A. Compared to ST1A, ST1C has additional options for connecting OEL input.

Model use, assumptions, validity domain and limitations

To be completed

Model inputs and output

The input variables are :

Variable Description Units
\(I_r P_u\) rotor current \({pu}\) (base \(S N_{om}\), user-selected base voltage)
\(U_s P_u\) measured stator voltage \({pu}\) (base \(U N_{om}\))
\(U_{s} R_{ef} P_u\) reference stator voltage \({pu}\) (base \(U N_{om}\))
\(U O_{el} P_u\) (optional) output voltage of overexcitation limiter \({pu}\) (base \(U N_{om}\))
\(U P_{ss} P_u\) (optional) output voltage of power system stabilizer \({pu}\) (base \(U N_{om}\))
\(U S_{cl} O_{el} P_u\) (optional) output voltage of stator current overexcitation limiter \({pu}\) (base \(U N_{om}\))
\(U S_{cl} U_{el} P_u\) (optional) output voltage of stator current underexcitation limiter \({pu}\) (base \(U N_{om}\))
\(U U_{el} P_u\) (optional) output voltage of underexcitation limiter \({pu}\) (base \(U N_{om}\))

The output signal is \(E_{fd} P_u\), the excitation voltage in \({pu}\) (user-selected base voltage).

Model parameters

Parameter Description Units
\(I_{lr} P_u\) Exciter output current limit reference \({pu}\) (base \(S N_{om}\), user-selected base voltage)
\(K_a\) Voltage regulator gain \({pu}\)
\(K_c\) Rectifier loading factor proportional to commutating reactance \({pu}\)
\(K_f\) Exciter rate feedback gain \({pu}\)
\(K_{lr}\) Gain of field current limiter \({pu}\)
\({PositionOel}\) Input location : (0) none, (1) voltage error summation, (2) take-over at AVR input, (3) take-over at AVR output \(-\)
\({PositionPss}\) Input location : (0) none, (1) voltage error summation, (2) summation at AVR output \(-\)
\({PositionScl}\) Input location : (0) none, (1) voltage error summation, (2) take-over at AVR input, (3) take-over at AVR output \(-\)
\({PositionUel}\) Input location : (0) none, (1) voltage error summation, (2) take-over at AVR input, (3) take-over at AVR output \(-\)
\(t_A\) Voltage regulator time constant \({s}\)
\(t_B\) Voltage regulator lag time constant \({s}\)
\(t_{B1}\) Voltage regulator second lag time constant \({s}\)
\(t_C\) Voltage regulator lead time constant \({s}\)
\(t_{C1}\) Voltage regulator second lead time constant \({s}\)
\(t_F\) Exciter rate feedback time constant \({s}\)
\(t_R\) Stator voltage filter time constant \({s}\)
\(V_{a} Max P_u\) Maximum output voltage of voltage regulator \({pu}\) (user-selected base voltage)
\(V_{a} Min P_u\) Minimum output voltage of voltage regulator \({pu}\) (user-selected base voltage)
\(V_{i} Max P_u\) Maximum input voltage of voltage regulator \({pu}\) (user-selected base voltage)
\(V_{i} Min P_u\) Minimum input voltage of voltage regulator \({pu}\) (user-selected base voltage)
\(V_{r} Max P_u\) Maximum field voltage \({pu}\) (user-selected base voltage)
\(V_{r} Min P_u\) Minimum field voltage \({pu}\) (user-selected base voltage)

Model diagram

Figure 1: ST1C block diagram

Model variant

In the ST1A model :

  • the overexcitation limiter voltage is applied at the AVR output
  • there is no stator current limiter

Open source implementations

This model has been successfully implemented in :

Software URL Language Open-Source License Last consulted date Comments
Dynawo Link Modelica MPL v2.0 24/05/2024

References

Back to top

Found an issue with this page or want to suggest improvements?

📝 Evaluate